Capstone Documentation Beta

Classes

Arm​Instruction

ARM Instruction

Arm64Instruction

ARM-64 Instruction

Mips​Instruction

MIPS Instruction

X86Instruction

X86 Instruction

Power​PCInstruction

PowerPC Instruction

Sparc​Instruction

SPARC Instruction

System​ZInstruction

SystemZ Instruction

XCore​Instruction

XCore Instruction

M68kInstruction

M68K Instruction

TMS320C64xInstruction

TMS320C64x Instruction

M680xInstruction

M680x Instruction

Ethereum​Instruction

Ethereum Instruction

Mos65xx​Instruction

MOS65xx Instruction

Capstone

An instance of Capstone is used to disassemble code.

Instruction

Base class for all disassembled instructions.

Platform​Instruction​Base

Base class for platform-specific instructions without registers.

Platform​Instruction

Base class for platform-specific instructions with registers.

Structures

Arm​Instruction.​Operand

Operand for Arm instructions.

Arm​Instruction.​Operand.​Memory

Operand value referring to memory.

Arm64Instruction.​Operand

Operand for Arm64 instructions.

Arm64Instruction.​Operand.​Memory

Operand value referring to memory.

Access

Common instruction operand access types - to be consistent across all architectures.

M680xInstruction.​Operand

Operand for M680x instructions.

M680xInstruction.​Operand.​Indexed​Address

Operand referring to indexed addressing.

M680xInstruction.​Operand.​Relative​Address

Operand referring to relative addressing (Bcc/LBcc).

M680xInstruction.​Operand.​Extended​Address

Operand referring to extended addressing.

M680xIdx
M680xOpFlags
M68kInstruction.​Operand

Operand for M68k instructions.

M68kInstruction.​Operand.​Memory

Instruction operand referring to memory

M68kInstruction.​Operand.​Branch​Displacement

Data when operand is a branch displacement

Mips​Instruction.​Operand

Operand for MIPS instructions.

Mips​Instruction.​Operand.​Memory

Operand value referring to memory.

Mode

Mode type

Mode.​mos65xx
Mos65xx​Instruction.​Operand

Operand for MOS65xx instructions.

Power​PCInstruction.​Operand

Operand for PowerPC instructions.

Power​PCInstruction.​Operand.​Memory

Operand value referring to memory.

Power​PCInstruction.​Operand.​Condition

Condition value.

Sparc​Instruction.​Operand

Operand for SPARC instructions.

Sparc​Instruction.​Operand.​Memory

Operand value referring to memory.

Sparc​Hint

Branch hint

System​ZInstruction.​Operand

Operand for SystemZ instructions.

System​ZInstruction.​Operand.​Memory

Operand value referring to memory.

TMS320C64xInstruction.​Functional​Unit
TMS320C64xInstruction.​Operand

Operand for TMS320C64x instructions.

TMS320C64xInstruction.​Operand.​Memory

Operand referring to memory

X86Instruction.​Operand

Operand for X86 instructions.

X86Instruction.​Operand.​Memory

Operand referring to memory

X86Instruction.​SIB

SIB Layout

X86Instruction.​Encoding

Encoding information.

X86Eflags
X86Fpu​Flags
XCore​Instruction.​Operand

Operand for XCore instructions.

XCore​Instruction.​Operand.​Memory

Operand referring to memory

Enumerations

Architecture

Architecture type

Arm​Instruction.​Operand.​Shift

Instruction operand shift.

Arm​Instruction.​Operand.​Shift.​Direction

Shift direction

Arm64Sft

ARM64 shift type

Arm64Ext

ARM64 extender type

Arm64Cc

ARM64 condition code

Arm64Sysreg

System registers

Arm64Pstate

System PState Field (MSR instruction)

Arm64Vas

Vector arrangement specifier (for FloatingPoint/Advanced SIMD insn)

Arm64Barrier

Memory barrier operands

Arm64Op

Operand type for instruction's operands

Arm64Tlbi

TLBI operations

Arm64At

AT operations

Arm64Dc

DC operations

Arm64Ic

IC operations

Arm64Prfm

Prefetch operations (PRFM)

Arm64Reg

ARM64 registers

Arm64Ins

ARM64 instruction

Arm64Grp

Group of ARM64 instructions

Arm​Sft

ARM shift type

Arm​Cc

ARM condition code

Arm​Sysreg

Special registers for MSR

Arm​Mb

The memory barrier constants map directly to the 4-bit encoding of the option field for Memory Barrier operations.

Arm​Op

Operand type for instruction's operands

Arm​Setend

Operand type for SETEND instruction

Arm​Cpsmode
Arm​Cpsflag

Operand type for SETEND instruction

Arm​Vectordata

Data type for elements of vector instructions.

Arm​Reg

ARM registers

Arm​Ins

ARM instruction

Arm​Grp

Group of ARM instructions

Build​Mode

Compilation modes for the Capstone library.

Capstone​Error

Errors thrown by Capstone

Evm​Ins

EVM instruction

Evm​Grp

Group of EVM instructions

Instruction​Group

Common instruction groups - to be consistent across all architectures.

M680xOperand
M680xReg

M680X registers and special registers

M680xOp

Operand type for instruction's operands

M680xOffset
M680xGrp

Group of M680X instructions

M680xIns

M680X instruction IDs

M68kInstruction.​Operation​Size

Operation size of the current instruction (NOT the size of the instruction)

M68kOperand
M68kReg

M68K registers and special registers

M68kAm

M68K Addressing Modes

M68kOp

Operand type for instruction's operands

M68kOpBrDisp​Size

Operand type for instruction's operands

M68kCpu​Size

Operation size of the CPU instructions

M68kFpu​Size

Operation size of the FPU instructions (Notice that FPU instruction can also use CPU sizes if needed)

M68kSize

Type of size that is being used for the current instruction

M68kIns

M68K instruction

M68kGrp

Group of M68K instructions

Mips​Op

Operand type for instruction's operands

Mips​Reg

MIPS registers

Mips​Ins

MIPS instruction

Mips​Ins​Mod
Mips​Grp

Group of MIPS instructions

Mode.​endian

Endianness modes

Mode.​bits

Bitness modes

Mode.​arm

ARM modes

Mode.​mips

MIPS modes

Mode.​sparc

SPARC modes

Mode.​ppc

PowerPC modes

Mode.​m68k

M68K modes

Mode.​m680x

M680X modes

Mos65xx​Reg

MOS65XX registers and special registers

Mos65xx​Am

MOS65XX Addressing Modes

Mos65xx​Ins

MOS65XX instruction

Mos65xx​Grp

Group of MOS65XX instructions

Mos65xx​Op

Operand type for instruction's operands

Disassembly​Option

Runtime option for the disassembler engine.

Skip​Data​Result

Return value for a skip data callback

Ppc​Bc

PPC branch codes for some branch instructions

Ppc​Bh

PPC branch hint for some branch instructions

Ppc​Op

Operand type for instruction's operands

Ppc​Reg

PPC registers

Ppc​Ins

PPC instruction

Ppc​Grp

Group of PPC instructions

Sparc​Cc

Enums corresponding to Sparc condition codes, both icc's and fcc's.

Sparc​Op

Operand type for instruction's operands

Sparc​Reg

SPARC registers

Sparc​Ins

SPARC instruction

Sparc​Grp

Group of SPARC instructions

Syntax

Syntax options

Sysz​Cc

Enums corresponding to SystemZ condition codes

Sysz​Op

Operand type for instruction's operands

Sysz​Reg

SystemZ registers

Sysz​Ins

SystemZ instruction

Sysz​Grp

Group of SystemZ instructions

TMS320C64xInstruction.​Operand.​Memory.​Displacement

Displacement type and value.

Tms320c64xOp
Tms320c64xMem​Disp
Tms320c64xMem​Dir
Tms320c64xMem​Mod
Tms320c64xReg
Tms320c64xIns
Tms320c64xGrp
Tms320c64xFunit
X86Reg

X86 registers

X86Op

Operand type for instruction's operands

X86Xop​Cc

XOP Code Condition type

X86Avx​Bcast

AVX broadcast type

X86Sse​Cc

SSE Code Condition type

X86Avx​Cc

AVX Code Condition type

X86Avx​Rm

AVX static rounding mode type

X86Prefix

Instruction prefixes - to be used in cs_x86.prefix[]

X86Ins

X86 instructions

X86Grp

Group of X86 instructions

Xcore​Op

Operand type for instruction's operands

Xcore​Reg

XCore registers

Xcore​Ins

XCore instruction

Xcore​Grp

Group of XCore instructions

Protocols

Instruction​Type

Protocol conformed to by enumerations representing architecture-specific instructions.

Arm​Operand​Value
Arm64Operand​Value
Operand​Container

Protocol for instructions that contain operands.

Instruction​Operand

Protocol for instruction operands.

M680xOperand​Value
M68kOperand​Value
Mips​Operand​Value
Mos65xx​Operand​Value
Ppc​Operand​Value
Sparc​Operand​Value
Sysz​Operand​Value
Tms320c64xOperand​Value
X86Operand​Value
Xcore​Operand​Value

Typealiases

Skip​Data​Callback

User-defined callback for skipData option.